The present invention relates to semiconductor memory devices, and more particularly, to nonvolatile memory devices and methods of forming nonvolatile memory devices.
Generally, semiconductor memory devices may be classified into volatile semiconductor memory devices and non-volatile semiconductor memory devices. The volatile semiconductor memory devices may lose their stored data when their power supplies are interrupted while the non-volatile semiconductor memory devices generally retain their stored data even when their power supplies are interrupted.
A flash memory device is a nonvolatile memory device and may be classified into a floating gate type or a charge trap type, depending on the type of a data storage layer that constitutes a unit cell.
A charge trap type flash memory device may include a cell structure wherein a tunneling layer, a trap layer and a gate layer may be stacked. The trap layer of the flash memory device of the charge trap type may be formed on an active region and a device isolation region. That is, the trap layers of memory cells are connected to each other on the device isolation region. When the flash memory device of the charge trap type is programmed, electrons may be stored in the trap layer. Since the trap layer may also be formed on the device isolation region, electrons stored in the trap layer of the memory cell may move to the trap layer on the device isolation region. Accordingly, reliability of a memory device may be degraded. For example, the stored data may be distorted to a different data value and/or errors may occur in a program operation